Conventionally, semiconductor packages for side by side or split die require a redistribution layer (RDL) or bridge interposer embedded in the package substrate for interconnecting the side by side dies. Because of placement errors encountered during the placement of the side by side dies on the package substrate, landing pads are necessary to align the dies with the RDL interconnections or interposer embedded in the substrate. Since the placement errors typically encountered are 10 μm or greater, large width landing pads for the embedded RDL interconnections are required. These landing pads are 80 μm wide or larger. With such large landing pads, the line/spacing (L/S) of the interconnection routings of the RDL between the landing pads is necessarily large as well. Large L/S interconnections result in more congestion in the routing distribution and larger chips to accommodate the required routing. With the trend towards smaller, less congested semiconductor packages, large L/S interconnections are not desirable.
Accordingly, there is a need for semiconductor interconnections and methods for making the interconnections that improve upon conventional methods including the improved methods and apparatus provided hereby.
The inventive features that are characteristic of the teachings, together with further features and advantages, are better understood from the detailed description and the accompanying figures. Each of the figures is provided for the purpose of illustration and description only, and does not limit the present teachings.